Design Exploration of an Instruction-Based Shared Markov Table on CMPs

Our project starts from investigating if instruction-based sharing exists on commercial workloads such as Apache, Zeus, Jbb, and Oltp running on CMPs. We find that there is a large amount of instruction-based sharing on CMPs. Constructive interference at the instruction cache miss level also exists among different CMP cores. We further study if the implementation of a shared Markov table can help reduce L1 instruction cache misses for each CMP core. We find that a reasonably small shared Markov table, varying from 4K entries to 32K entries, can help reduce L1 instruction cache misses and can potentially evenly increase each CMP core’s performance and thus the overall CMP performance.